ppc: Add pwr9 flag

Will be used to gate code using vec_absd and other useful instructions.
This commit is contained in:
Luca Barbato
2024-02-29 11:22:57 +00:00
parent 643195f546
commit 700c36a687
5 changed files with 11 additions and 1 deletions
+3
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@@ -82,6 +82,9 @@ static ALWAYS_INLINE unsigned dav1d_get_cpu_flags(void) {
#if defined(__VSX__)
flags |= DAV1D_PPC_CPU_FLAG_VSX;
#endif
#if defined(__POWER9_VECTOR__)
flags |= DAV1D_PPC_CPU_FLAG_PWR9;
#endif
#elif ARCH_RISCV
#if defined(__riscv_v)
flags |= DAV1D_RISCV_CPU_FLAG_V;
+4
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@@ -40,12 +40,16 @@ COLD unsigned dav1d_get_cpu_flags_ppc(void) {
unsigned flags = 0;
#if defined(HAVE_GETAUXVAL) && ARCH_PPC64LE
unsigned long hw_cap = getauxval(AT_HWCAP);
unsigned long hw_cap2 = getauxval(AT_HWCAP2);
#elif defined(HAVE_ELF_AUX_INFO) && ARCH_PPC64LE
unsigned long hw_cap = 0;
unsigned long hw_cap2 = 0;
elf_aux_info(AT_HWCAP, &hw_cap, sizeof(hw_cap));
elf_aux_info(AT_HWCAP2, &hw_cap2, sizeof(hw_cap2));
#endif
#ifdef HAVE_AUX
flags |= (hw_cap & PPC_FEATURE_HAS_VSX) ? DAV1D_PPC_CPU_FLAG_VSX : 0;
flags |= (hw_cap2 & PPC_FEATURE2_ARCH_3_00) ? DAV1D_PPC_CPU_FLAG_PWR9 : 0;
#endif
return flags;
}
+1
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@@ -30,6 +30,7 @@
enum CpuFlags {
DAV1D_PPC_CPU_FLAG_VSX = 1 << 0,
DAV1D_PPC_CPU_FLAG_PWR9 = 1 << 1,
};
unsigned dav1d_get_cpu_flags_ppc(void);
+1
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@@ -116,6 +116,7 @@ static const struct {
{ "LASX", "lasx", DAV1D_LOONGARCH_CPU_FLAG_LASX },
#elif ARCH_PPC64LE
{ "VSX", "vsx", DAV1D_PPC_CPU_FLAG_VSX },
{ "PWR9", "pwr9", DAV1D_PPC_CPU_FLAG_PWR9 },
#elif ARCH_RISCV
{ "RVV", "rvv", DAV1D_RISCV_CPU_FLAG_V },
#endif
+2 -1
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@@ -104,7 +104,7 @@ static const struct option long_opts[] = {
#elif ARCH_LOONGARCH
#define ALLOWED_CPU_MASKS ", 'lsx' or 'lasx'"
#elif ARCH_PPC64LE
#define ALLOWED_CPU_MASKS " or 'vsx'"
#define ALLOWED_CPU_MASKS ", 'vsx' or 'pwr9'"
#elif ARCH_RISCV
#define ALLOWED_CPU_MASKS " or 'rvv'"
#elif ARCH_X86
@@ -243,6 +243,7 @@ static const EnumParseTable cpu_mask_tbl[] = {
{ "lasx", DAV1D_LOONGARCH_CPU_FLAG_LASX },
#elif ARCH_PPC64LE
{ "vsx", DAV1D_PPC_CPU_FLAG_VSX },
{ "pwr9", DAV1D_PPC_CPU_FLAG_PWR9 },
#elif ARCH_RISCV
{ "rvv", DAV1D_RISCV_CPU_FLAG_V },
#elif ARCH_X86