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configure: Check for the dotprod and i8mm aarch64 extensions

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This commit is contained in:
Martin Storsjö
2025-02-28 16:07:53 +02:00
parent 87044b210a
commit fc4012fb67
2 changed files with 23 additions and 4 deletions
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common/aarch64/asm.S
+16
View File
@@ -67,6 +67,20 @@
#endif #endif
.arch AS_ARCH_LEVEL .arch AS_ARCH_LEVEL
#if HAVE_AS_ARCHEXT_DOTPROD_DIRECTIVE
#define ENABLE_DOTPROD .arch_extension dotprod
#define DISABLE_DOTPROD .arch_extension nodotprod
#else
#define ENABLE_DOTPROD
#define DISABLE_DOTPROD
#endif
#if HAVE_AS_ARCHEXT_I8MM_DIRECTIVE
#define ENABLE_I8MM .arch_extension i8mm
#define DISABLE_I8MM .arch_extension noi8mm
#else
#define ENABLE_I8MM
#define DISABLE_I8MM
#endif
#if HAVE_AS_ARCHEXT_SVE_DIRECTIVE #if HAVE_AS_ARCHEXT_SVE_DIRECTIVE
#define ENABLE_SVE .arch_extension sve #define ENABLE_SVE .arch_extension sve
#define DISABLE_SVE .arch_extension nosve #define DISABLE_SVE .arch_extension nosve
@@ -87,6 +101,8 @@
* the .arch level. This makes it clear if we try to assemble an instruction * the .arch level. This makes it clear if we try to assemble an instruction
* from an unintended extension set; we only allow assmbling such instructions * from an unintended extension set; we only allow assmbling such instructions
* within regions where we explicitly enable those extensions. */ * within regions where we explicitly enable those extensions. */
DISABLE_DOTPROD
DISABLE_I8MM
DISABLE_SVE DISABLE_SVE
DISABLE_SVE2 DISABLE_SVE2
configure
Vendored
+7 -4
View File
@@ -423,9 +423,10 @@ NL="
# list of all preprocessor HAVE values we can define # list of all preprocessor HAVE values we can define
CONFIG_HAVE="MALLOC_H ALTIVEC ALTIVEC_H MMX ARMV6 ARMV6T2 NEON AARCH64 BEOSTHREAD POSIXTHREAD WIN32THREAD THREAD LOG2F SWSCALE \ CONFIG_HAVE="MALLOC_H ALTIVEC ALTIVEC_H MMX ARMV6 ARMV6T2 NEON AARCH64 BEOSTHREAD POSIXTHREAD WIN32THREAD THREAD LOG2F SWSCALE \
LAVF FFMS GPAC AVS GPL VECTOREXT INTERLACED CPU_COUNT OPENCL THP LSMASH X86_INLINE_ASM AS_FUNC INTEL_DISPATCHER \ LAVF FFMS GPAC AVS GPL VECTOREXT INTERLACED CPU_COUNT OPENCL THP LSMASH X86_INLINE_ASM AS_FUNC INTEL_DISPATCHER \
MSA LSX MMAP WINRT VSX ARM_INLINE_ASM STRTOK_R CLOCK_GETTIME BITDEPTH8 BITDEPTH10 SVE SVE2 ELF_AUX_INFO GETAUXVAL \ MSA LSX MMAP WINRT VSX ARM_INLINE_ASM STRTOK_R CLOCK_GETTIME BITDEPTH8 BITDEPTH10 ELF_AUX_INFO GETAUXVAL \
SYSCONF SYNC_FETCH_AND_ADD \ SYSCONF SYNC_FETCH_AND_ADD \
AS_ARCHEXT_SVE_DIRECTIVE AS_ARCHEXT_SVE2_DIRECTIVE" DOTPROD I8MM SVE SVE2 \
AS_ARCHEXT_DOTPROD_DIRECTIVE AS_ARCHEXT_I8MM_DIRECTIVE AS_ARCHEXT_SVE_DIRECTIVE AS_ARCHEXT_SVE2_DIRECTIVE"
# parse options # parse options
@@ -1050,8 +1051,10 @@ if [ $asm = auto -a $ARCH = AARCH64 ] ; then
as_check ".arch ${as_arch_level}+crc" && as_arch_level="${as_arch_level}+crc" as_check ".arch ${as_arch_level}+crc" && as_arch_level="${as_arch_level}+crc"
define AS_ARCH_LEVEL "$as_arch_level" define AS_ARCH_LEVEL "$as_arch_level"
as_archext_check sve "ptrue p0.b, vl16" as_archext_check dotprod "udot v0.4s, v0.16b, v0.16b"
as_archext_check sve2 "smlalb z10.s, z2.h, z1.h" as_archext_check i8mm "usdot v0.4s, v0.16b, v0.16b"
as_archext_check sve "ptrue p0.b, vl16"
as_archext_check sve2 "smlalb z10.s, z2.h, z1.h"
fi fi
if [ $asm = auto -a \( $ARCH = ARM -o $ARCH = AARCH64 \) ] ; then if [ $asm = auto -a \( $ARCH = ARM -o $ARCH = AARCH64 \) ] ; then