diff --git a/src/riscv/64/cpu.S b/src/riscv/64/cpu.S index b0e76f62..a81c6d87 100644 --- a/src/riscv/64/cpu.S +++ b/src/riscv/64/cpu.S @@ -42,3 +42,8 @@ function has_compliant_rvv, export=1, ext=v sgtz a0, a0 ret endfunc + +function get_vlenb, export=1 + csrr a0, vlenb + ret +endfunc diff --git a/src/riscv/cpu.h b/src/riscv/cpu.h index 8ab7f531..f020f6a6 100644 --- a/src/riscv/cpu.h +++ b/src/riscv/cpu.h @@ -34,4 +34,8 @@ enum CpuFlags { unsigned dav1d_get_cpu_flags_riscv(void); +int dav1d_get_vlenb(void); + +#define dav1d_get_vlen() (dav1d_get_vlenb()*8) + #endif /* DAV1D_SRC_RISCV_CPU_H */ diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c index 2115ed3e..c0b2b11d 100644 --- a/tests/checkasm/checkasm.c +++ b/tests/checkasm/checkasm.c @@ -129,8 +129,6 @@ static const struct { #if ARCH_AARCH64 && HAVE_SVE int checkasm_sve_length(void); -#elif ARCH_RISCV -int checkasm_get_vlenb(void); #endif typedef struct CheckasmFuncVersion { @@ -853,10 +851,8 @@ int main(int argc, char *argv[]) { fprintf(stderr, "checkasm: %s (%08X) using random seed %u\n", name, cpuid, state.seed); #elif ARCH_RISCV char buf[32] = ""; - if (cpu_flags & DAV1D_RISCV_CPU_FLAG_V) { - const int vlen = 8*checkasm_get_vlenb(); - snprintf(buf, sizeof(buf), "VLEN=%i bits, ", vlen); - } + if (cpu_flags & DAV1D_RISCV_CPU_FLAG_V) + snprintf(buf, sizeof(buf), "VLEN=%i bits, ", dav1d_get_vlen()); fprintf(stderr, "checkasm: %susing random seed %u\n", buf, state.seed); #elif ARCH_AARCH64 && HAVE_SVE char buf[48] = ""; diff --git a/tests/checkasm/riscv/checkasm_64.S b/tests/checkasm/riscv/checkasm_64.S index 8557eabf..0d02e5f1 100644 --- a/tests/checkasm/riscv/checkasm_64.S +++ b/tests/checkasm/riscv/checkasm_64.S @@ -83,11 +83,6 @@ endconst thread_local saved_regs, quads=29 # 5 + 12 + 12 -function get_vlenb, export=1 - csrr a0, vlenb - ret -endfunc - function checked_call, export=1, ext=v /* Save the function ptr, RA, SP, unallocatable and callee-saved registers */ la.tls.ie t0, saved_regs