riscv64/itx: Add 16-point 8bpc RVV flipadst transform
inv_txfm_add_16x16_adst_flipadst_0_8bpc_c: 15272.2 ( 1.00x) inv_txfm_add_16x16_adst_flipadst_0_8bpc_rvv: 1824.4 ( 8.37x) inv_txfm_add_16x16_adst_flipadst_1_8bpc_c: 15261.2 ( 1.00x) inv_txfm_add_16x16_adst_flipadst_1_8bpc_rvv: 1824.5 ( 8.36x) inv_txfm_add_16x16_adst_flipadst_2_8bpc_c: 15260.0 ( 1.00x) inv_txfm_add_16x16_adst_flipadst_2_8bpc_rvv: 1824.5 ( 8.36x) inv_txfm_add_16x16_dct_flipadst_0_8bpc_c: 14497.2 ( 1.00x) inv_txfm_add_16x16_dct_flipadst_0_8bpc_rvv: 1637.3 ( 8.85x) inv_txfm_add_16x16_dct_flipadst_1_8bpc_c: 14490.5 ( 1.00x) inv_txfm_add_16x16_dct_flipadst_1_8bpc_rvv: 1637.3 ( 8.85x) inv_txfm_add_16x16_dct_flipadst_2_8bpc_c: 14486.4 ( 1.00x) inv_txfm_add_16x16_dct_flipadst_2_8bpc_rvv: 1637.3 ( 8.85x) inv_txfm_add_16x16_flipadst_adst_0_8bpc_c: 15307.7 ( 1.00x) inv_txfm_add_16x16_flipadst_adst_0_8bpc_rvv: 1808.0 ( 8.47x) inv_txfm_add_16x16_flipadst_adst_1_8bpc_c: 15341.0 ( 1.00x) inv_txfm_add_16x16_flipadst_adst_1_8bpc_rvv: 1808.1 ( 8.48x) inv_txfm_add_16x16_flipadst_adst_2_8bpc_c: 15333.5 ( 1.00x) inv_txfm_add_16x16_flipadst_adst_2_8bpc_rvv: 1808.1 ( 8.48x) inv_txfm_add_16x16_flipadst_dct_0_8bpc_c: 14530.0 ( 1.00x) inv_txfm_add_16x16_flipadst_dct_0_8bpc_rvv: 1636.4 ( 8.88x) inv_txfm_add_16x16_flipadst_dct_1_8bpc_c: 14510.3 ( 1.00x) inv_txfm_add_16x16_flipadst_dct_1_8bpc_rvv: 1636.3 ( 8.87x) inv_txfm_add_16x16_flipadst_dct_2_8bpc_c: 14504.7 ( 1.00x) inv_txfm_add_16x16_flipadst_dct_2_8bpc_rvv: 1636.3 ( 8.86x) inv_txfm_add_16x16_flipadst_flipadst_0_8bpc_c: 15315.5 ( 1.00x) inv_txfm_add_16x16_flipadst_flipadst_0_8bpc_rvv: 1823.5 ( 8.40x) inv_txfm_add_16x16_flipadst_flipadst_1_8bpc_c: 15324.1 ( 1.00x) inv_txfm_add_16x16_flipadst_flipadst_1_8bpc_rvv: 1823.3 ( 8.40x) inv_txfm_add_16x16_flipadst_flipadst_2_8bpc_c: 15315.6 ( 1.00x) inv_txfm_add_16x16_flipadst_flipadst_2_8bpc_rvv: 1823.5 ( 8.40x)
This commit is contained in:
@@ -1188,6 +1188,11 @@ function inv_adst_e16_x16_rvv, export=1, ext=v
|
||||
jr t0
|
||||
endfunc
|
||||
|
||||
function inv_flipadst_e16_x16_rvv, export=1, ext=v
|
||||
iadst_16 v15, v14, v13, v12, v11, v10, v9, v8, v7, v6, v5, v4, v3, v2, v1, v0
|
||||
jr t0
|
||||
endfunc
|
||||
|
||||
.macro def_horz_16 variant
|
||||
function inv_txfm_horz\variant\()_16x8_rvv, export=1, ext=v
|
||||
vmv.v.x v16, zero
|
||||
@@ -1323,7 +1328,12 @@ endfunc
|
||||
def_fn_16x16 dct, dct
|
||||
def_fn_16x16 identity, identity
|
||||
def_fn_16x16 dct, adst
|
||||
def_fn_16x16 dct, flipadst
|
||||
def_fn_16x16 dct, identity
|
||||
def_fn_16x16 adst, dct
|
||||
def_fn_16x16 adst, adst
|
||||
def_fn_16x16 adst, flipadst
|
||||
def_fn_16x16 flipadst, dct
|
||||
def_fn_16x16 flipadst, adst
|
||||
def_fn_16x16 flipadst, flipadst
|
||||
def_fn_16x16 identity, dct
|
||||
|
||||
+1
-6
@@ -106,11 +106,6 @@ static ALWAYS_INLINE void itx_dsp_init_riscv(Dav1dInvTxfmDSPContext *const c, in
|
||||
#if BITDEPTH == 8
|
||||
assign_itx17_fn( , 4, 4, rvv);
|
||||
assign_itx16_fn( , 8, 8, rvv);
|
||||
assign_itx2_fn( , 16, 16, rvv);
|
||||
assign_itx_fn( , 16, 16, dct_adst, ADST_DCT, rvv);
|
||||
assign_itx_fn( , 16, 16, dct_identity, H_DCT, rvv);
|
||||
assign_itx_fn( , 16, 16, adst_dct, DCT_ADST, rvv);
|
||||
assign_itx_fn( , 16, 16, adst_adst, ADST_ADST, rvv);
|
||||
assign_itx_fn( , 16, 16, identity_dct, V_DCT, rvv);
|
||||
assign_itx12_fn( , 16, 16, rvv);
|
||||
#endif
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user